View LV25400W_5646042.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

51607 ms pc no.a0633-1/42 specifications of any and all sanyo semiconductor co.,l td. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' sproductsor equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general el ectronics equipment (home appliances, av equipment, communication device, office equipment, industrial equ ipment etc.). the products mentioned herein shall not be intended for use for any "special application" (medica l equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, t ransportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of re liability and can directly threaten human lives in case of failure or malfunction of the product or may cause har m to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for app lications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. if there is n o consultation or inquiry before the intended use, our customer shall be solely responsible for the use. LV25400W overview the LV25400W is a tuner front end ic that supports the sanyo sdrs400 car radio dsp. the LV25400W supports worldwide radio standards including the fm bands used in us, europe, and japan as well as the lw, mw, sw, and fm weather bands. it adopts an image cance ling mixer for the fm mixer and incorporates a fast pll locking function to support rds. the LV25400W also suppor ts automatic alignment using ccb bus control. it requires external eeprom. the LV25400W can implement a dsp tuner at low cost with a minimal number of external components. functions ? am, fm, fe, if, and pll circuits specifications maximum ratings at ta = 25 c parameter symbol conditions ratings unit v cc 8v osc_v cc (2), fe_v cc (58) 9.0 v maximum supply voltage v cc 5v xtal_v cc (13), v cc d (22), v cc a (40) 6.0 v ccb bus maximum input voltage v in max pin 18, 19, 20 -0.3 to +5.0 v ccb bus maximum output voltage v o pin 21 -0.3 to +6.5 v allowable power dissipation pd max ta 85 c *1 840 mw operating temperature topr -40 to +85 c storage temperature tstg -50 to +125 c *1 : ratings vary with characteristics of the circuit board (materials , size, etc.) on which the device is to be mounted. bi-cmos lsi for automotive applications dsp tuner front end orderin g numbe r : e*na0633a ? ccb is a registered trademark of sanyo electric co., ltd. ? ccb is sanyo semiconductor's original bus format. all bus addresses are managed by sanyo semiconductor for this format.
LV25400W no.a0633-2/42 recommended operating conditions at ta = 25 c parameter symbol conditions ratings unit v cc 8v osc_v cc (2), fe_v cc (58) 8.0 v recommended supply voltage v cc 5v xtal_v cc (13), v cc d (22), v cc a (40) 5 v v cc 8vop 7.5 to 8.5 v operating supply voltage range v cc 5vop 4.5 to 5.5 v ccb bus high-level input voltage v ih ce, di, cl 2.5 to 5.0 v ccb bus low-level input voltage v il ce, di, cl 0 to 0.8 v ccb bus high-level input current i ih ce, di, cl ; vi5.5v 10 or less a ccb bus low-level input current i il ce, di, cl ; vi0v 10 or less a do low-level output voltage v ol 0.38 or less v do high-level output voltage v oh connected to an lc75040. 2.1 or more v reception frequencies parameter symbol conditions frequency ratings unit fm reception frequencies f fm jpn, us, eur 76 to 108.1 mhz fm weather band reception frequencies f fm-wb 162.4 to 162.55 mhz f amlw lw 144 to 288 khz fammw mw 520 to 1710 khz am reception frequencies famsw sw 2.94 to 22.0 mhz
LV25400W no.a0633-3/42 power on/power off timing and the power on reset recommended operating ratings at ta = 25c, gnd = 0v ratings parameter symbol conditions min typ max unit vcop h pin 2, 54, 55, 58 7.5 8.5 v operating supply voltage vcop l pin 13, 22, 40 4.5 5.5 v vreg3 pin 23 2.7 3.3 v internal logic voltage vreg4 pin 24 3.7 4.3 v power application time (8.0 v 5.0 v) t7 10 100 msec vhmin3 pin 23 : design reference value 2.2 v internal register retention voltage vhmin4 pin 24 : design reference value 2.2 v internal register reset voltage voff pin 13, 22, 40 : design reference value 0 0.2 v internal register reset power supply rise time tpor pin 13, 22, 40 : design reference value 0.05 3 msec power application time (5.0 v 8.0 v) t14 10 100 msec t por t7 t14 voff vreg4 vcop_h vcop_l vreg3
LV25400W no.a0633-4/42 ac characteristics operating characteristics at ta = 25c, v cc = 8.0v, v dd = 5.0v, unless otherwise specified. ratings for publications * : these measurements are made using the yamaichi electro nics ic51-0644-807 ic socket. an ihf bandpass filter is used as the audio filter. fm characteristics - fm front end mixer input (no dummy) applied voltage ccb command parameter symbol conditions pin 25/26 pin 32 pin 50 pin 64 in1 in2 in3-1 in3-2 min typ max unit dc characteristics current drain-8v fm i cco -8v fm no input, fm mode i2+i54+i55+i58 3 15 13 25 25 38 48 56 ma current drain-5v fm i cco -5v fm no input, fm mode i13+i22+i40 3 15 13 25 25 31 40 46 ma current drain-8v fm i cco -8v fm2 no input, fm mode, ifagc-wide = off i2+i54+i55+i58 3 15 13 27 25 36 46 51 ma current drain-5v fm i cco -5v fm2 no input, fm mode i13+i22+i40 3 15 13 27 25 23 32 37 ma regulator bias 3v vreg3v the pin 23 voltage 3 15 13 25 25 2.7 3 3.3 v regulator bias 4v vreg4v the pin 24 voltage 3 15 13 25 25 3.6 4 4.4 v fm antenna dump output current iantd-f with 6.0v applied to pin 64 the pin 63 output current 0 0 6 15 13 25 25 5 8 12 ma crystal oscillator frequency fxtal d2-5, 6, 7 = [110] 3 62 48 25 25 4.5 mhz crystal oscillator level vxtal d2-5, 6, 7 = [110] (reference value) 3 62 48 25 25 15 30 mvrms crystal oscillator buffer level vxtal osc out2 d2-5, 6, 7 = [110] 3 62 48 25 25 115 165 mvrms vsmfm-1 10db v, the pin 38 dc output, no modulation 3 62 50 38 25b 0.65 0.95 1.25 v vsmfm-2 30db v, the pin 38 dc output, no modulation 3 62 50 38 25b 0.95 1.25 1.55 v vsmfm-3 50db v, the pin 38 dc output, no modulation 3 62 50 38 25b 2.10 2.15 2.20 v vsmfm-4 70db v, the pin 38 dc output, no modulation 3 62 50 38 25b 3.1 3.4 3.7 v s-meter dc output * : adjust the shifter bits with a 50db v input. vsmfm-5 90db v, the pin 38 dc output, no modulation 3 62 50 38 25b 3.7 4 4.3 v total gain from mixer to div if amplifier gmxdiv fm_mix_in,div_out_if (pin 31) ratio of the input to output signal levels 98.1mhz mod = off, 70db v-input 1.5 62 50 38 25 18.5 21.5 24.5 db div if amplifier gain gdiv if if_n_in1 (pin 45), div_out_if (pin 31) ratio of the input to output signal levels 10.7mhz mod = off, 88db v-input 3 62 50 38 25 4.5 7.5 10.5 db 1db compression point driver if 1db point dif if_n_in1 (pin 45), div_out_if (pin 31) ratio of the input to output signal levels 10.7mhz mod = off 3 62 50 38 25 111 db narrow if agc grain (fm) gifagcnf1 fm_analog_in (pin 45), 10.7outn (pin 29) ratio of the input to output signal levels 10.7mhz mod = off 100db v-input [d32-28 to 25] = 1011, with 0v applied to pin 26 0 62 50 38 25 -3.1 -0.6 1.9 db narrow if agc grain (fm) gifagcnf2 fm_analog_in (pin 45), 10.7outn (pin 29) ratio of the input to output signal levels 10.7mhz mod = off 80db v-input [d32-28 to 25] = 1011, with 3v applied to pin 26 3 62 50 38 25 16.9 21.4 25.9 db continued on next page.
LV25400W no.a0633-5/42 continued from preceding page. applied voltage ccb command parameter symbol conditions 25/26 pin 32 pin 50 pin 64 pin in1 in2 in3-1 in3-2 min typ max unit 1db complession point fm-narrow 1db point nf fm_analog_in (pin 45), 10.7outn (pin 29) 10.7mhz mod = off [d32-28 to 25] = 1011, with 0v applied to pin 26 0 62 50 38 25 105 db v wide if agc grain (fm) gifagcwf1 fm_hd_in (pin 48), hd_outn (pin 27) ratio of the input to output signal levels 10.7mhz mod = off 100db v-input [d2-15 to 12] = 1011, with 0v applied to pin 25 0 62 50 38 25 -3.5 -1 1.5 db wide if agc grain (fm) gifagcwf2 fm_hd_in (pin 48), hd_outn (pin 27) ratio of the input to output signal levels 10.7mhz mod = off 80db v-input [d2-15 to 12] = 1011, with 3v applied to pin 25 3 62 50 38 25 16.5 21 25.5 db 1db compression point fm - wide 1db point wf fm_hd_in (pin 48), hd_outp (pin 27) 10.7mhz mod = off [d2-15 to 12] = 1011 0 62 50 38 25 104 db v image cancellation ratio (us) ir us 98.1mhz reference, the amount rejected at +21.4mhz 1.5 62 50 38 25 17 db image cancellation ratio (jpn) ir jpn 83mhz reference, the amount rejected at -21.4mhz [d1-26, 27] = 01 1.5 69 50 38 25 15 db fm wide agc on sensitivity f1 wagc on-f1 fr = 102.1mhz fm-wide agc-bit [d32-3 to 0] = 0000 : minimum keyed-agc-bit [d32-11 to 8] = 0000 : minimum 0 0 62 50 38 13 78 85 92 db v fm wide agc on sensitivity f2 wagc on-f2 fr = 102.1mhz fm-wide agc-bit [d32-3 to 0] = 1111 : maximum keyed-agc-bit [d32-11 to 8] = 0000 : minimum 0 0 62 50 38 15 92 99 106 db v fm narrow agc on sensitivity f1 nagc on-f1 fr = 98.1mhz fm-narrow agc-bit [d32-7 to 4] = 0000 : minimum 0 3 62 50 38 16 66.5 73.5 80.5 db v fm narrow agc on sensitivity f2 nagc on-f2 fr = 98.1mhz fm-narrow agc-bit [d32-7 to 4] = 1111 : maximum 0 3 62 50 38 18 82.5 89.5 96.5 db v practical sensitivity s/n-31 c onnected to an la1787 (mpx, left channel output) *hcc off 98.1mhz, 31db v, fm = 1khz, 22.5khz-mod 61/62pin input 3 62 50 38 25 30 db signal-to-noise ratio s/n-90 connected to an la1787 (mpx, left channel output) 98.1mhz, 90db v, fm = 1khz, 22.5khz-mod 61/62pin input 0 62 50 38 25 54 57 db
LV25400W no.a0633-6/42 am characteristics : am, amant inputs applied voltage ccb command parameter symbol conditions pin 25/26 pin 32 pin 50 pin 64 in1 in2 in3-1 in3-2 min typ max unit dc characteristics current drain-8v am i cco -8v am no input, am mode i2+i54+i55+i58 3 33 15 26 26 32 44 54 ma current drain-5v am i cco -5v am no input, am mode i13+i22+i40 3 33 15 26 26 21 28 34 ma am antenna dump output current iantd-a when pin 50 is connected to ground the ant-d (pin 52) output current 3 33 15 26 26 3.5 6 9 ma ac characteristics first am amplifier gain gamp1 fm_n_in1 (pin 45) if_out (pin 43), after cf matching, 10.7mhz mod = off 74db v = input 0 33 44 26 26 5.2 6.2 7.2 db narrow if agc grain (am) gifagcna1 am_analog_in (pin 37), 10.7outn (pin 29) ratio of the input to output signal levels 10.7mhz mod = off 100db v-input [d32-28 to 25] = 1011, with 0v applied to pin 26 0 33 44 26 26 -1.6 0.9 3.4 db narrow if agc grain (am) gifagcna2 am_analog_in (pin 37), 10.7outn (pin 29) ratio of the input to output signal levels 10.7mhz mod = off 80db v-input [d32-28 to 25] = 1011, with 3v applied to pin 26 3 33 44 26 26 18 22.9 27 db 1db compression point am - narrow 1db point na am_analog_in (pin 37), 10.7outn (pin29) 10.7mhz mod = off [d32-28 to 25] = 1011, with 0v applied to pin 26 0 33 44 26 26 105 db v wide if agc grain (am) gifagcwa1 am_hd_in (pin 39), hd_outn (pin 27) ratio of the input to output signal levels 10.7mhz mod = off 100db v-input [d2-15 to 12] = 1011, with 0v applied to pin 25 0 33 44 26 26 -2.5 0 2.5 db wide if agc grain (am) gifagcwa2 am_hd_in (pin 39), hd_outn (pin 27) ratio of the input to output signal levels 10.7mhz mod = off 80db v-input [d2-15 to 12] = 1011, with 3v applied to pin 25 3 33 44 26 26 17.5 22 26.5 db 1db compression point am - wide 1db point wa am_hd_in (pin 39), hd_outp (pin 27) 10.7mhz mod = off [d2-15 to 12] = 1011, with 0v applied to pin 25 0 33 44 26 26 104 db v am wide agc on sensitivity a1 wagc on-a1 am-ant-in = 1.4mhz, mod = off the input level such that the ant_d (pin 52) level becomes 0.5v. am wide agc sensitivity control setting (d32-3 to d32-0) : 0000 (the minimum value) 3 33 44 26 27 78.5 83.5 88.5 db v am wide agc on sensitivity a2 wagc on-a2 am-ant-in = 1.4mhz, mod = off the input level such that the ant_d (pin 52) level becomes 0.5v. am wide agc sensitivity control setting (d32-3 to d32-0) : 1101 3 33 44 26 29 92 97 102 db v continued on next page.
LV25400W no.a0633-7/42 continued from preceding page. applied voltage ccb command parameter symbol conditions pin 25/26 pin 32 pin 50 pin 64 in1 in2 in3-1 in3-2 min typ max unit am narrow agc on sensitivity a1 nagc on-a1 am-ant-in = 1mhz, mod = off the input level such that the ant_d (pin 52) level becomes 0.5v. am narrow agc sensitivity control setting (d32-7 to d32-4) : 0000 (the minimum value) 3 33 44 26 30 60 65 70 db v am narrow agc on sensitivity a2 nagc on-a2 am-ant-in = 1mhz, mod = off the input level such that the ant_d (pin 52) level becomes 0.5v. am narrow agc sensitivity control setting (d32-7 to d32-4) : 1111 (the maxim value) 3 33 44 26 32 75 80 85 db v total am gain amgain 1mhz, 60db v, mod = off, the ration of the am_ant input and the 10.7outn (pin 29) output levels 3 33 44 26 32 33.5 39 44.5 db practical sensitivity s/n-33 with an la1787 connected with a 1mhz, 33db v, fm = 1khz, 30% modulation ant input and the if agc voltage = 3v add. 3 33 44 26 32 20 db thd_1 thd-74 with an la1787 connected with a 1mhz, 74db v, fm = 1khz, 80% modulation ant input and the if agc voltage adjusted so that the ifagcout level is 100db v. adjusted 33 44 26 32 0.7 1.2 % thd_2 thd-77 with an la1787 connected with a 1mhz, 77db v, fm = 1khz, 80% modulation ant input and the if agc voltage adjusted so that the ifagcout level is 100db v. adjusted 33 44 26 32 0.7 1.2 % signal-to-noise ratio s/n-74 with an la1787 connected with a 1mhz, 74db v, fm = 1khz, 80% modulation ant input and the if agc voltage adjusted so that the ifagcout level is 100db v. adjusted 33 44 26 32 52.5 56 db
LV25400W no.a0633-8/42 dc characteristics operating characteristics at ta = 25c, v cc = 8.0v, v dd = 5.0, gnd = 0, v ss = 0, unless otherwise specified. ratings for publications * : these measurements are made using the yamaichi electronics ic51-0644-807 ic socket. *: undefined fm: no input ccb command pin no. parameter symbol conditions in1 in2 in3-1 in3-2 min typ max unit 1 fe_gnd v1fm 15 13 25 25 0 v 2 osc_v cc v2fm 15 13 25 25 8 v 3 osc_b v3fm 15 13 25 25 2.65 v 4 osc_c v4fm 15 13 25 25 7.45 v 5 vt v5fm 15 13 25 25 0 8 v 6 fet_gnd v6fm 15 13 25 25 0 v 7 pll-lpf v7fm 15 13 25 25 * v 8 fm fet v8fm 15 13 25 25 * v 9 am fet v9fm 15 13 25 25 * v 10 cpam v10fm 15 13 25 25 * v 11 cpfm v11fm 15 13 25 25 * v 12 gnd (digital) v12fm 15 13 25 25 0 v 13 v cc (x'tal) v13fm 15 13 25 25 5 v 14 x'tal in v14fm 15 13 25 25 2.7 v 15 x'tal out v15fm 15 13 25 25 4.1 v 16 gnd (x'tal) v16fm 15 13 25 25 0 v 17 x'tal-buffer-out v17fm 15 13 25 25 3.45 v 18 ce v18fm 15 13 25 25 bus v 19 di v19fm 15 13 25 25 bus v 20 cl v20fm 15 13 25 25 bus v 21 do v21fm 15 13 25 25 0 note 1 v 22 v cc 5v (digital) v22fm 15 13 25 25 5 v 23 pll v dd (3v reg) v23fm 15 13 25 25 3.1 v 24 pll v dd (4v reg) v24fm 15 13 25 25 4.15 v 25 agc-control-in (hd) v25fm 15 13 25 25 input v 26 agc-control-in (analog) v26fm 15 13 25 25 input v 27 ifagc-outn (hd) v27fm 15 13 25 25 2.75 v 28 ifagc-outp (hd) v28fm 15 13 25 25 2.75 v 29 ifagc-outn (analog) v29fm 15 13 25 25 2.75 v 30 ifagc-outp (analog) v30fm 15 13 25 25 2.75 v 31 div-if-out v31fm 15 13 25 25 1.95 v 32 vsm-dc v32fm 15 13 25 25 0 5 v 33 2.7v reg v33fm 15 13 25 25 2.7 v 34 ifagc-in (analog-bypass) v34fm 15 13 25 25 2.45 v 35 ifagc-in (hd-bypass) v35fm 15 13 25 25 2.45 v 36 gnd (analog) v36fm 15 13 25 25 0 v 37 ifagc-in (analog) v37fm 15 13 25 25 2.45 v 38 vsm-ac v38fm 15 13 25 25 0 5 v 39 ifagc-in (hd) v39fm 15 13 25 25 2.45 v 40 v cc 5v (analog) v40fm 15 13 25 25 5 v 41 am-narrow-agc-in v41fm 15 13 25 25 * v 42 address sw/dac-monitor v42fm 15 13 25 25 3.1 v 43 am-1st-if-out v43fm 15 13 25 25 7.5 v 44 4.9v reg v44fm 15 13 25 25 4.7 v 45 if-narrow-in v45fm 15 13 25 25 2.6 v 46 if-narrow-in(bypass) v46fm 15 13 25 25 2.6 v 47 am-wide-agc (bypass) v47fm 15 13 25 25 1.5 v continued on next page.
LV25400W no.a0633-9/42 continued from preceding page. ccb command pin no. parameter symbol conditions in1 in2 in3-1 in3-2 min typ max unit 48 if-wide-in v48fm 15 13 25 25 2.05 v 49 if-wide-in (bypass) v49fm 15 13 25 25 2.05 v 50 am-rf-agc v50fm 15 13 25 25 1 v 51 am-rf-agc (bypass) v51fm 15 13 25 25 1 v 52 am-ant-d v52fm 15 13 25 25 0 0.3 v 53 fm-narrow-agc-in v53fm 15 13 25 25 0.3 v 54 fm/am-mix-out v54fm 15 13 25 25 8 v 55 fm/am-mix-out v55fm 15 13 25 25 8 v 56 ant-dac v56fm 15 13 25 25 0 8 v 57 rf-dac v57fm 15 13 25 25 0 8 v 58 v cc (8v) v58fm 15 13 25 25 8 v 59 am-mix-in v59fm 15 13 25 25 0.2 v 60 am-mix-in v60fm 15 13 25 25 0.2 v 61 fm-mix-in v61fm 15 13 25 25 3 v 62 fm-mix-in v62fm 15 13 25 25 3 v 63 fm-rf-agc v63fm 15 13 25 25 0.2 v 64 fm-ant-d v64fm 15 13 25 25 8 v note 1 : pull-up voltage am: no input ccb command pin no. parameter symbol conditions in1 in2 in3-1 in3-2 min typ max unit 1 fe_gnd v1am 33 15 26 26 0 v 2 osc_v cc v2am 33 15 26 26 8 v 3 osc_b v3am 33 15 26 26 2.65 v 4 osc_c v4am 33 15 26 26 7.45 v 5 vt v5am 33 15 26 26 0 8 v 6 fet_gnd v6am 33 15 26 26 0 v 7 pll-lpf v7am 33 15 26 26 * v 8 fm fet v8am 33 15 26 26 * v 9 am fet v9am 33 15 26 26 * v 10 cpam v10am 33 15 26 26 * v 11 cpfm v11am 33 15 26 26 * v 12 gnd (digital) v12am 33 15 26 26 0 v 13 v cc (x'tal) v13am 33 15 26 26 5 v 14 x'tal in v14am 33 15 26 26 2.7 v 15 x'tal out v15am 33 15 26 26 4.1 v 16 gnd (x'tal) v16am 33 15 26 26 0 v 17 x'tal-buffer-out v17am 33 15 26 26 3.45 v 18 ce v18am 33 15 26 26 bus v 19 di v19am 33 15 26 26 bus v 20 cl v20am 33 15 26 26 bus v 21 do v21am 33 15 26 26 0 note 1 v 22 v cc 5v (digital) v22am 33 15 26 26 5 v 23 pll v dd (3v reg) v23am 33 15 26 26 3.1 v 24 pll v dd (4v reg) v24am 33 15 26 26 4.15 v 25 agc-control-in (hd) v25am 33 15 26 26 input v 26 agc-control-in (analog) v26am 33 15 26 26 input v 27 ifagc-outn (hd) v27am 33 15 26 26 2.75 v continued on next page.
LV25400W no.a0633-10/42 continued from preceding page. ccb command pin no. parameter symbol conditions in1 in2 in3-1 in3-2 min typ max unit 28 ifagc-outp (hd) v28am 33 15 26 26 2.75 v 29 ifagc-outn (analog) v29am 33 15 26 26 2.75 v 30 ifagc-outp (analog) v30am 33 15 26 26 2.75 v 31 div-if-out v31am 33 15 26 26 1.95 v 32 vsm-dc v32am 33 15 26 26 0 5 v 33 2.7v reg v33am 33 15 26 26 2.7 v 34 ifagc-in (analog-bypass) v34am 33 15 26 26 2.2 v 35 ifagc-in (hd-bypass) v35am 33 15 26 26 2.1 v 36 gnd (analog) v36am 33 15 26 26 0 v 37 ifagc-in (analog) v37am 33 15 26 26 2.2 v 38 vsm-ac v38am 33 15 26 26 0 5 v 39 ifagc-in (hd) v39am 33 15 26 26 2.1 v 40 v cc 5v (analog) v40am 33 15 26 26 5 v 41 am-narrow-agc-in v41am 33 15 26 26 * v 42 address sw/dac-monitor v42am 33 15 26 26 3.1 v 43 am-1st-if-out v43am 33 15 26 26 4.8 v 44 4.9v reg v44am 33 15 26 26 4.7 v 45 if-narrow-in v45am 33 15 26 26 2.65 v 46 if-narrow-in (bypass) v46am 33 15 26 26 2.65 v 47 am-wide-agc (bypass) v47am 33 15 26 26 2.25 v 48 if-wide-in v48am 33 15 26 26 2.4 v 49 if-wide-in (bypass) v49am 33 15 26 26 2.4 v 50 am-rf-agc v50am 33 15 26 26 6.45 v 51 am-rf-agc (bypass) v51am 33 15 26 26 0.8 v 52 am-ant-d v52am 33 15 26 26 0 v 53 fm-narrow-agc-in v53am 33 15 26 26 0.4 v 54 fm/am-mix-out v54am 33 15 26 26 8 v 55 fm/am-mix-out v55am 33 15 26 26 8 v 56 ant-dac v56am 33 15 26 26 0 8 v 57 rf-dac v57am 33 15 26 26 0 8 v 58 v cc (8v) v58am 33 15 26 26 8 v 59 am-mix-in v59am 33 15 26 26 2.65 v 60 am-mix-in v60am 33 15 26 26 2.65 v 61 fm-mix-in v61am 33 15 26 26 1.5 v 62 fm-mix-in v62am 33 15 26 26 1.5 v 63 fm-rf-agc v63am 33 15 26 26 7 v 64 fm-ant-d v64am 33 15 26 26 0 v ccb command parameter symbol conditions in1 in2 in3-1 in3-2 min typ max unit tuner off v33 19 37 25 25 0.03 v
LV25400W no.a0633-11/42 ccb command parameter symbol conditions in1 in2 in3-1 in3-2 min typ max unit ant-dac all_off (000000000) dac560 15 13 1 25 105 285 mv d10_setp (100000000) dac561 (dac56_1 )-(dac56_0) 15 13 2 25 3 20 mv d11_setp (010000000) dac562 (dac56_2 )-(dac56_0) 15 13 3 25 5 35 mv d12_setp (001000000) dac563 (dac56_3 )-(dac56_0) 15 13 5 25 15 65 mv d13_setp (000100000) dac564 (dac56_4 )-(dac56_0) 15 13 7 25 35 125 mv d14_setp (000010000) dac565 (dac56_5 )-(dac56_0) 15 13 9 25 120 250 mv d15_setp (000001000) dac566 (dac56_6 )-(dac56_0) 15 13 11 25 310 490 mv d16_setp (000000100) dac567 (dac56_7 )-(dac56_0) 15 13 13 25 730 960 mv d17_setp (000000010) dac568 (dac56_8 )-(dac56_0) 15 13 15 25 1.5 1.9 v d18_setp (000000001) dac569 (dac56_9 )-(dac56_0) 15 13 17 25 3.05 3.75 v all_on (111111111) dac56a 15 13 18 25 6.25 7.55 v rf-dac all_off (111111111) dac570 15 13 1 25 105 285 mv d0_setp (100000000) dac571 (dac57_1 )-(dac57_0) 15 13 2 25 3 20 mv d1_setp (010000000) dac572 (dac57_2 )-(dac57_0) 15 13 3 25 5 35 mv d2_setp (001000000) dac573 (dac57_3 )-(dac57_0) 15 13 5 25 15 65 mv d3_setp (000100000) dac574 (dac57_4 )-(dac57_0) 15 13 7 25 35 125 mv d4_setp (000010000) dac575 (dac57_5 )-(dac57_0) 15 13 9 25 120 250 mv d5_setp (000001000) dac576 (dac57_6 )-(dac57_0) 15 13 11 25 310 490 mv d6_setp (000000100) dac577 (dac57_7 )-(dac57_0) 15 13 13 25 730 960 mv d7_setp (000000010) dac578 (dac57_8 )-(dac57_0) 15 13 15 25 1.5 1.9 v d8_setp (000000001) dac579 (dac57_9 )-(dac57_0) 15 13 17 25 3.05 3.75 v all_on (111111111) dac57a 15 13 18 25 6.25 7.55 v package dimensions unit : mm (typ) 3190a 10.0 10.0 12.0 12.0 0.15 0.5 (1.5) 0.1 1.7max 0.18 0.5 (1.25) 116 17 32 33 48 49 64 sanyo : sqfp64(10x10)
LV25400W no.a0633-12/42 pin functions pin no. pin pin no. pin 1 fe_gnd 33 vreg2.7v 2 osc_v cc 34 am_analog_in bypass 3 osc_b 35 am_hd_in bypass 4 osc_c 36 agnd 5 pll-vt 37 am analog in 6 fet_gnd 38 vsm_ac 7 pll-lpf_am 39 am hd in (35k cf) 8 fm_fet_out 40 v cc a5v 9 am_fet_out 41 am _n-agc pick-up 10 am_cp 42 address-sw 11 fm_cp 43 if_out 12 dgnd 44 vreg4.9v 13 xtal_v cc 45 if-n_in1 (cf = 180k) 14 xtal-in 46 if-n_in2 (180k_bypass) 15 xtal-out 47 am-w-agc 16 xtal_gnd 48 if-w_in1 (cf = 500k) 17 xtal_osc_out2 49 if-w_in2 (500k_bypass) 18 ce 50 am-rf-agc 19 di 51 am rf-agc (bypass) 20 cl 52 am-ant-d 21 do 53 fm n-agc-in 22 v cc d5v 54 mix-out 23 vreg 3v 55 mix-out 24 vreg 4v 56 ant-dac 25 agc_dac_i 57 rf-dac 26 agc_dac_s 58 fe_v cc 8v 27 hd-radio out n 59 am-mix-in2 (bypass) 28 hd-radio out p 60 am-mix-in1 29 10.7m out n 61 fm-mix-in1 30 10.7m out p 62 fm-mix-in2 31 div_out_if 63 fm-ant d 32 vsm_dc 64 fm-rf-agc
LV25400W no.a0633-13/42 functions am/fm front-end agc block fm image rejection mixer (iq-mix) gain switching : 1 bit fm iq-mix phase adjust (for the japanese fm band) 2 bit dac am double balance mixer pin diode drive agc output (am/fm) wide agc sensitivity setting (am/fm) 4 bit dac narrow agc sensitivity setting (am/fm) 4 bit dac keyed agc adjust (fm) 4 bit dac am rf agc 4 bit dac local oscillator 155mhz to 262mhz local osc divider (fm/am) division by 1, 2, or 3 local osc divider (am) division by 10, 8, 6, or 4 ant/rf dac (fm) 9 bit dac am 1st if amp block 1st-if amplifier 10.7m (narrow) fm if block s-meter shifter 5 bit dac if limiter amplifier 6 stage s-meter (dc for keyed agc) (fm) if output driver for dsp/iboc (10.7mhz output) if-agc block if agc amplifier (control voltage from dsp) if output driver for dsp/iboc 10.7mhz if if buffer output for diversity 10.7mhz if if gain adjust 4 bit dac if agc amp-off-sw for the analog system and the iboc system ; 1 bit each pll fast lock pll filter sw 1 bit sw other tuner off 1 bit sw 2.7v regurator adjust 2 bit dac
LV25400W no.a0633-14/42 block diagram 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 8v 5v 5v 8v 5v coil tuning circuit l p f l p f xtal 4.5mhz if buffer am rf amplifier circuit bpf am antenna circuit fm rf amplifier circuit fm rf tuning circuit am mixer/ fm iq-mixer mix coil ecl2 1/4,1/6 1/8,1/10 am rf- agc compalate s-meter shifter if gain variation correction (narrow output) if gain variation correction (wide output) wide agc am 1st amp limitter amp singal meter keyed agc narrow agc rf agc ant-d ant dac rf dac ecl1 1/1,1/2 1/3 vco am/fm w-agc tuner adjustment fm agc am/fm n-agc fm keyed-agc am rf- agc amp sens wide agc narrow agc rf agc ant-d am agc in 1 in 2 in 3-1 in 3-2 nmos tr pll swallow counter p-ctr phase det charge pump r-ctr power on reset 3v reg computer control bus xtal osc 4v reg 4.9v reg s-meter (main/sub) 2.7v reg am amp fm amp hd if agc amp am amp fm amp analog if agc amp buffer if agc amp cf10.7mhz_50k cf10.7mhz_500k cf10.7mhz_180k xtal filter_16khz
LV25400W no.a0633-15/42 equivalent circuits pin no. pin description equivalent circuit 1 fe.gnd 8v gnd (f.e.) 2 osc v cc dedicated oscillator system power supply 8v v cc (vco.) 3 4 fm/am osc_b fm/am osc_c oscillator connections 5 6 7 8 9 10 11 tuning voltage output low-pass filter output fet ground am filter fm mode fet am mode fet am charge pump fm charge pump fm mode : a pll filter is formed on pins 8 through 11. (pins 9 and 10 are left open.) am mode : a pll filter is formed on pins 7, 9, and 10. in this mode, a low-pass filter is formed by the internal impedance (10k ? ) and an external capacitor. 12 digital gnd 13 xtal v cc dedicated crystal oscillator system power supply 5v v cc (xtal) 14 15 x'tal-osc-in x'tal-osc-out connect a 4,5mhz crystal element between pins 14 and 15. connect a 10pf capacitor between pin 14 and ground, and connect a 150pf capacitor between pin 15 and ground. continued on next page. 500 ? 500 ? v cc (2pin) 5k ? 5k ? 333 ? 4 3 3k ? 5k ? v cc pin58 v dd pin23 1k ? 2.2k ? 1.3k ? 30k ? 220pf 2200pf 0.01 f 0.033 f 1 f fet-gnd vt am-filter fmfet amfet cpam cpfm vt tentative 11 10 9 8 7 5 6 v cc (pin13) es6 500 ? 500 ? 333 ? 333 ? 333 ? 1k ? 20k ? 1k ? 1.5k ? 5k ? 5k ? 500 ? 35pf 8pf 4pf 2pf 1.5k ? 1.5k ? 1.5k ? 1.5k ? 1.5k ? 17 15 14 amp amp amp alc to pll
LV25400W no.a0633-16/42 continued from preceding page. pin no. pin description equivalent circuit 16 xtal gnd dedicated crystal oscillator system ground 17 xtal osc2 crystal oscillator output 2 for use by a 2-tuner clock 18 ce used to enable serial data input (di) to the LV25400W or force the output to the high level during serial data output. 19 di input for the serial data transferred to the LV25400W from the controller. continued on next page. 500 ? 1k ? 17 18 3v p-mos p-mos n-mos p-mos n-mos n-mos v ss (pin12) p-mos n-mos 19 3v p-mos p-mos n-mos p-mos n-mos n-mos v ss (pin12) p-mos n-mos
LV25400W no.a0633-17/42 continued from preceding page. pin no. pin description equivalent circuit 20 cl clock used for synchronization when serial data is input to the LV25400W (di) or when serial data is output (do). 21 do output for serial data output to the controller by the LV25400W. note : the pull-up resistor must be in the range 10k ? to 50k ? . 22 v cc d digital system power supply 5v v cc (digital) 23 pll vreg (v dd ) - 3v regulator output for the pll circuit - 3v continued on next page. 500 ? 500 ? 21 v ss (pin12) v ss (pin12) 5k ? 23 v cc (8v) v cc (22pin) v dd pll 41.7k ? dac 20 3v p-mos p-mos n-mos p-mos n-mos n-mos v ss (pin12) p-mos n-mos
LV25400W no.a0633-18/42 continued from preceding page. pin no. pin description equivalent circuit 24 swallow counter vreg - 4v regulator output for the pll swallow counter - 4v 25 agc_dac_i if agc control bias is supplied from the lc75040 (for iboc). 26 agc_dac_s if agc control bias is supplied from the lc75040 (for the analog system). 27 28 hd_outn hd_outp wideband if (10.7mhz) signal differential output to the lc75040 for iboc use. continued on next page. 24 v cc (8v) v cc (22pin) 4v swallow 41.7k ? 25 200k ? 5.6v 100k ? 26 200k ? 5.6v 100k ? 300 ? 300 ? 500 ? 500 ? 200 ? 27 28 v cc (40pin) v cc (40pin)
LV25400W no.a0633-19/42 continued from preceding page. pin no. pin description equivalent circuit 29 30 10.7outn 10.7outp narrowband if (10.7mhz) signal differential output to the lc75040 for analog use. 31 div_out_if driver 10.7mhz signal buffer output 32 s-meter (dc) current driver s-meter output ac components are removed with an external capacitor. 33 vref 2.7v 2.7v regulator continued on next page. 300 ? 300 ? 500 ? 500 ? 200 ? 29 30 v cc (40pin) v cc (40pin) 31 10k ? 26k ? 200 ? v cc (58pin) 200 ? 38 10k ? 300 ? v cc (40pin) 33 30k ? 333 ? v cc (pin40) 1k ?
LV25400W no.a0633-20/42 continued from preceding page. pin no. pin description equivalent circuit 34 37 am analog_in bypass am analog_in am analog signal system related input (am narrowband 10.7mhz if signal) 35 39 am hd_in bypass am hd_in iboc and am analog signal system related input (am narrowband 10.7mhz if signal) 36 analog gnd 38 s-meter ac output pin fm mode: s-meter ac signal output 40 v cc a analog system power supply 5v v cc (analog) 41 am narrow-agc pick-up am narrow agc detection 42 address_sw when two tuners are used, one of the two ics' pin 42 is connected to ground, need changes the address. continued on next page. 20k ? 34 v cc (40pin) 37 300 ? 300 ? 20k ? 35 v cc (40pin) 39 300 ? 300 ? 38 7k ? 300 ? v cc (pin40) 41 10k ? 500 ? 500 ? 42 1k ?
LV25400W no.a0633-21/42 continued from preceding page. pin no. pin description equivalent circuit 43 am 1stif_amp_out first am if amplifier output 44 vreg4.9v 4.9v regulator 45 46 if-n_in1 if-n_in2 first am if amplifier input driver 10.7mhz signal buffer input fm limiter amplifier input 47 am w-agc used for wide agc pickup. there is a built-in amplifier. continued on next page. 333k ? 43 50 ? v cc_58pin 15k ? v cc (pin40) 44 1k ? 1k ? 34k ? 50k ? 46 500 ? 500 ? 500 ? 300 ? 300 ? v 270 ? 500 ? 500 ? 2pf 2pf 500 ? 500 ? 45 47 1k ? 1k ? 10k ?
LV25400W no.a0633-22/42 continued from preceding page. pin no. pin description equivalent circuit 48 49 fm if-w_in1 fm if-w_in2 wideband fm if agc clamp input 50 51 am rf-agc am rf-agc-bypass rf agc rectifying capacitor determines the distortion for low-frequency modulation. increasing the size of c50 and c 51 : distortion improves response becomes slower reducing the size of c50 and c 51 : distortion degrades response becomes faster 52 am ant-d provides the pin diode drive current. i52 = 6ma this is the antenna dumping current. continued on next page. 20k ? 49 v cc (40pin) 48 10k ? 10k ? 500 ? 500 ? 500 ? 100 ? 5k ? 1k ? v cc (pin 58) 51 1k ? c59 1 f c64 10 f + 50 + 750 ? 15k ? 1k ? 500 ? 200 ? 52 v cc_8v
LV25400W no.a0633-23/42 continued from preceding page. pin no. pin description equivalent circuit 53 fm narrow agc used for narrow agc pickup. there is a built-in amplifier. 54 55 am/fm 1st-mix out fm/am mixer output (common) 56 57 ant dac rf dac 9-bit d/a converter 58 v cc a v cc 8v fm fe/am 59 60 am mix-in2 (bypass) am mix-in1 am mixer input input impedance : 10k ? 61 62 fm mix-in1 fm mix-in2 fm mixer input fm wide agc pickup input impedance : 10k ? continued on next page. 53 2.5k ? 1k ? agc amp 10k ? 2.2v 54 55 fm mix am mix 57 56 1k ? 1k ? 1k ? 60 59 110 ? 110 ? 2.5k ? 10k ? 10k ? 12k ? v cc (pin58) 61 60 500 ? agc amp fm mix 500 ? 10k ? 10k ? 2.2v
LV25400W no.a0633-24/42 continued from preceding page. pin no. pin description equivalent circuit 63 fm ant d pin 63 : the antenna driving current flows when the rf agc voltage reaches (v cc - vbe). 64 fm rf agc rf agc voltage 63 v cc 300 ? 300 ? 75k ? 64 v cc 500 ? 500 ? 12k ? 30k ? 500 ? 500 ?
LV25400W no.a0633-25/42 sanyo serial bus data timing ce : chip enable cl : clock di : data input do : data output (pin information only) ?? when cl is stopped at the l level ?? ?? when cl is stopped at the h level ?? parameter symbol pin conditions min typ max unit data setup time tsu di, cl 0.45 s data hold time thd di, cl 0.45 s clock l-level time tcl cl 0.45 s clock h-level time tch cl 0.45 s ce wait time tel ce, cl 0.45 s ce setup time tes ce, cl 0.45 s ce hold time teh ce, cl 0.45 s data latch change time tlc 0.45 s data input high-level voltage v ih cl, di, ce 2.5 5.0 v data input low-level voltage v il cl, di, ce -0.3 0.8 v tch teh tes thd tsu old new tlc tel tcl v il v ih v ih v ih v ih v ih v ih v ih v il v il v il internal data latch cl di ce tcl teh tes thd tsu old new tlc tel tch v il v ih v ih v ih v ih v ih v ih v il v il v il internal data latch cl di ce
LV25400W no.a0633-26/42 serial data i/o procedures the LV25400W uses the sanyo audio ic serial bus format. data is input and output using a ccb (computer control bus). the LV25400W adopts an 8-bit address version of the ccb format. address i/o mode b0 b1 b2 b3 a0 a1 a2 a3 contents in1 0 0 0 1 0 1 0 0 [1] in1b 0 1 0 1 0 1 0 0 ? control data input mode. pll setup ? 32 bits of data are input ? in1b is the 2-tuner mode address (when pin 42 is tied to ground) in2 1 0 0 1 0 1 0 0 [2] in2b 1 1 0 1 0 1 0 0 ? control data input mode. pll setup ? 32 bits of data are input ? in2b is the 2-tuner mode address (when pin 42 is tied to ground) in3 1 0 0 1 0 1 1 0 [3] in3b 0 0 0 1 0 1 1 0 ? the tuner block is set up in control data input (serial data input) mode. ? 32 bits of data are input - there is a sub-address ? in3b is the 2-tuner mode address (when pin 42 is tied to ground) first data in1/2 a3 a2 a1 a0 b3 b2 b1 b0 di i/o mode determined ce cl
LV25400W no.a0633-27/42 d1-00 d1-01 d1-02 d1-03 d1-04 d1-05 d1-06 d1-07 d1-08 d1-09 d1-10 d1-11 d1-12 d1-13 d1-14 d1-15 d1-16 d1-17 d1-18 d1-19 d1-20 d1-21 d1-22 d1-23 d1-24 d1-25 d1-26 d1-27 d1-28 d1-29 d1-30 d1-31 p00 p01 p02 p03 p04 p05 p06 p07 p08 p09 p10 p11 p12 p13 p14 p15 osc d1 osc d2 am/fm dvs r0 r1 r2 r3 osc_div wb delay_adj0 delay_adj1 mode 0 0 0 llll (8) (7) (6) (5) (4) (3) (2) (1) lllllll l l - - - - - - - - - - - - - - - - hh h dvs 0 1 program-ctr stop program-ctr normal operation 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 0000 0000 0000 0000 0101 1010 1111 divide by 272 divide by 500 divide by 1000 divide by 2000 divide by 21845 divide by 43690 divide by 65535 : : : : : : : : : : : : 0000 0100 1000 0000 0101 1010 1111 0001 0001 0011 0111 0101 1010 1111 0001 1111 1110 1101 0101 1010 1111 4.5, 7.2mhz 100khz 50khz 25khz 25khz 12.5khz 6.25khz 3.125khz 3.125khz 10khz 9khz 5khz 1khz 3khz 30khz illegal value illegal value am/fm 0 1 0 1 0 1 osd d2 0 0 1 1 osd d1 divisor by 10 divisor by 8 divisor by 6 divisor by 4 divisor fm am a 3 a 2 a 1 a 0 b 3 b 2 b 1 b 0 0 0 1 0 1 0 0 0 in1 setting am oscillator divisor control 0 0 1 1 wb 0 1 0 1 osd div divisor by 2 divisor by 3 divisor by 1 divisor by 1 divisor am/fm/wb oscillator divisor control pll filter switching programmable counter divisor setting (from 272 to 65535) fm-iqmix phase_adjust * wb : select 1 for weather band reception 0 1 0 1 deiay_adj0 0 0 1 1 deiay_adj1 small large adjustment amount in address code reference frequency setting normal filter state mode am/fm am filter fm filter w-filter 0 0 1 off on 0 1 1on on off on lsb msb
LV25400W no.a0633-28/42 d2-00 d2-01 d2-02 d2-03 d2-04 d2-05 d2-06 d2-07 d2-08 d2-09 d2-10 d2-11 d2-12 d2-13 d2-14 d2-15 d2-16 d2-17 d2-18 d2-19 d2-20 d2-21 d2-22 d2-23 d2-24 d2-25 d2-26 d2-27 d2-28 d2-29 d2-30 d2-31 0 0 0 0 0 x_sw_0 x_sw_1 x_sw_2 reg_adj0 reg_adj1 xs0 xs1 adj_w0 adj_w1 adj_w2 adj_w3 il0 il1 dt0 dt1 uld ul0 ul1 two_doff 0 0 dz0 dz1 dlc test0 test1 test2 llll (19) (18) (20) (15) (16) (17) (14) (9) (10) (11) (12) (13) lllllll l lllllllhlllllhlll ll l ic test mode these bits are normally set to : test0 = 0 test1 = 0 test2 = 0 charge pump control 0 1 normal operation stopped two-tuner crystal oscillator buffer switching 0 1 normal operation stopped 0000 0001 0010 0011 0100 0101 0110 0111 1010 1011 1100 1101 1110 1111 +5db -5db 00 01 10 11 -23mv (center value) +23mv +64mv 0 0 1 1 il1 0 1 0 1 il0 open the i3 pin state (unused) the i2 pin state (unused) the i1 pin state (unused) in a 3 a 2 a 1 a 0 b 3 b 2 b 1 b 0 0 0 1 0 1 0 0 1 in2 setting do pin control data (2) 0 0 0 0 uld 0 0 1 1 1 1 1 1 0 0 1 1 dt1 low when not locked. monitor 1 (unused) monitor 2 (unused) (see do control (2)) open monitor 1 (unused) monitor 2 (unused) (see do control (2)) do pin 0 1 0 1 0 1 0 1 dt0 do pin control data (1) 0 0 1 1 xs1 0 1 0 1 xs0 4.5mhz 7.2mhz 20.5mhz* illegal value x'tal osc crystal oscillator selection unlock detection switching x'tal osc adj [when a 4.5mhz oscillator element is used] 2.7v reg adj *use of a 20.5mhz crystal requires a separate hardware modification. 0 0 1 1 dz1 0 1 0 1 dz0 dza dzb dzc dzd dead zone mode dead zone control 0 0 1 1 ul1 ul0 0 1 0 1 stopped 0 0.5 s 1 s e detection width open e is output directly e is delayed by 1 to 2 ms. e is delayed by 1 to 2 ms. detection pin output in address code lsb msb if gain variation correction in2 d15-12 (wide out side) 000 001 010 011 100 101 110 111 xtal (center value) +150hz ic internal signals i/o ports control data 0 : input, 1 : output normally set to 0.
LV25400W no.a0633-29/42 d31-00 d31-01 d31-02 d31-03 d31-04 d31-05 d31-06 d31-07 d31-08 d31-09 d31-10 d31-11 d31-12 d31-13 d31-14 d31-15 d31-16 d31-17 d31-18 d31-19 d31-20 d31-21 d31-22 d31-23 d31-24 d31-25 d31-26 d31-27 d31-28 d31-29 d31-30 d31-31 llll (37) (27) (26) (24) (25) (22) (21) (23) lllllll l lllllllllllllllll ll l iq mixer gain adjustment 0 1 gain down normal operation narrow-10.7mhz 0 1 on off wide-10.7mhz 0 1 on off tuner off setting 0 1 normal operation tuner off fm agc on 0 1 normal on am agc on 0 1 normal on 000000000 000000001 000000010 000000011 000000100 000000101 000000110 000000111 000001000 111111010 111111011 111111100 111111101 111111110 111111111 0.3v 7.1v a 3 a 2 a 1 a 0 b 3 b 2 b 1 b 0 0 1 1 0 1 0 0 1 0 in3-1 tuner setting 1 address 69h, subaddress[0] test for dac 0:normal 1:test-mode in address code sub address code lsb msb ant-dac 000000000 000000001 000000010 000000011 000000100 000000101 000000110 000000111 000001000 111111010 111111011 111111100 111111101 111111110 111111111 0.3v 7.1v rf-dac
LV25400W no.a0633-30/42 d32-00 d32-01 d32-02 d32-03 d32-04 d32-05 d32-06 d32-07 d32-08 d32-09 d32-10 d32-11 d32-12 d32-13 d32-14 d32-15 d32-16 d32-17 d32-18 d32-19 d32-20 d32-21 d32-22 d32-23 d32-24 d32-25 d32-26 d32-27 d32-28 fmfetoff w_keyed d32-31 llll (37) (36) (35) (33) (34) (28) (29) (30) (31) (32) lllllll l lllllllllllllllll ll l fm pin diode forced on switch 0 1 normal operation forced on keyed agc switch 0 1 wide+narrow narrow only a 3 a 2 a 1 a 0 b 3 b 2 b 1 b 0 0 1 1 0 1 0 0 1 1 in3-2 tuner setting 2 address 69h, subaddress [1] in address code sub address code lsb msb +5db -5db if agc clamp variations correction in3-2 d28-25 (narrow-out side) 0000 0001 0010 0011 0100 0101 0110 0111 1010 1011 1100 1101 1110 1111 1.0 +v be 2.5 +v be am rf agc amplifier threshold (gradual) 0000 0001 0010 0011 0100 0101 0110 0111 1010 1011 1100 1101 1110 1111 198 a(1.2v) 300 a(1.9v) s-meter shift(tsout) 00000 00001 00010 00011 00100 00101 00110 00111 11010 11011 11100 11101 11110 11111 1.0 2.5 am rf agc amplifier threshold (steep) 0000 0001 0010 0011 0100 0101 0110 0111 1010 1011 1100 1101 1110 1111 0.14 2.2 keyed agc threshold 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 0.14 2.57 fm/am w-agc sensitivity 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 0.14 2.5 fm/am n-agc sensitivity 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
LV25400W no.a0633-31/42 control data documentation no. control block/data description related data (1) programmable divider data p0 to p15 dvs ? sets the programmable divider's divisor. this is a binary value in which p0 is the lsb, p15 the msb. dvs = 0 : the ic internal fmin pin is stopped (pulled down) dvs = 1 : the ic internal fmin pin is selected set divisor (n) : 272 to 65536 input frequency range : 120 to 270 mhz * : see the "programmable divider struct ure" section for more information. am/fm osc d1, d2 wb, osc div (2) am oscillator divisor control osc d1, osc d2 ? osc d1, osc d2 ? am oscillator divisor control osc d1 osc d2 divisor 0 0 divide by 10 0 1 divide by 8 1 0 divide by 6 1 1 divide by 4 am/fm p0 to p15 (3) tuner mode switching am/fm ? tuner mode switching between am and fm 1 = am 0 = fm p0 to p15 osc d1, d2 (4) programmable divider stop dvs ? dvs = 0 : the ic internal pll-in pin is stopped (pulled down) dvs = 1 : the ic internal pll-in pin is selected set divisor (n) : 272 to 65536 input frequency range : 120 to 270 mhz * : see the "programmable divider struct ure" section for more information. cts gt0, gt1 ctp ctc (5) reference divider data r0 to r3 ? selects the reference frequency. reference frequency setting (khz) r3 r2 r1 r0 crystal : 20.5mhz crystal : 4.5/7.2mhz 0 0 0 0 illegal value 100 0 0 0 1 100 50 0 0 1 0 50 25 0 0 1 1 25 25 0 1 0 0 12.5 12.5 0 1 0 1 6.25 6.25 0 1 1 0 3.125 3.125 0 1 1 1 3.125 3.125 1 0 0 0 10 10 1 0 0 1 illegal value 9 1 0 1 0 5 5 1 0 1 1 1 1 1 1 0 0 illegal value 3 1 1 0 1 illegal value 30 1 1 1 0 illegal value illegal value 1 1 1 1 illegal value illegal value continued on next page.
LV25400W no.a0633-32/42 continued from preceding page. no. control block/data description related data (6) tuner mode switching am/fm oscillator divisor osc_div wb (1) am/fm/wb oscillator divisor control wb osc div divisor 0 0 1 1 0 1 0 1 divide by 2 divide by 3 divide by 1 divide by 1 * : wb: select 1 for weather band reception (2) am oscillator divisor control osd d2 osc d1 divisor 0 1 0 1 0 0 1 1 divide by 10 divide by 8 divide by 6 divide by 4 in fm mode, only the wb and osc div bits are valid. in am mode, this function is set up by combination of the osc d2, osc (however, this is fixed at the divide-by-2 setting) d1, wb, and the osc div bits. fm (japan) : fixed at the divide-by-3 setting fm (other regions) : fixed at the divide-by-2 setting wb : fixed at the divide-by-1 setting (ok if wb = 1) in am mode, set wb = 0, osc div = 0 for the divide-by-2 setting. the osc d2 and osc d1 bits can be set according to end product needs. example : usa : (1) (2) = divide by 20 sw2 : (1) (2) = divide by 8 p0 to p15 dvs (7) fm iq mixer phase adjustment delay_adj0 delay_adj1 ? fm iq mixer phase adjustment fm-iqmix phase_adjust delay_adj0 delay_adj1 adjustment amount 0 0 1 1 0 1 0 1 small large osc_div continued on next page.
LV25400W no.a0633-33/42 continued from preceding page. no. control block/data description related data (8) pll filter switching mode mode ? switches the pll filter pll filter switching filter state mo de am/fm am filter fm filter 0 off on normal 0 1 on off 0 w-filter 1 1 on on normal mode (mode = 0) the filter state is switched in conjunction with the am/fm bit. fm mode (am/fm = 0) a filter is formed on pins 8 and 11. since this filter can be independent of the filt er used in am mode, pll locking can be fast. am mode (am/fm = 1) a filter is formed on pins 9 and 10 and wi th the two internal switches sw1 and sw2. an additional filter is added using an internal resistor and an external capacitor. w-filter mode (mode = 1) both filters are enabled, regardless of the am/fm bit. (all of pins 8, 9, 10, and 11, and switches sw1 and sw2 are used.) this is used when sidebands occur in am mode, and in other cases. however, there are case where, depending on the particular filter component values, this mode cannot be used. am/fm (9) ic internal signals i/o ports control data ? specifies the i/o direction for the i/o ports data = 0 : input port. the value 0 should be specified in normal operation. = 1 : output port. a value of 1 is used for ic testing. * : this data must be set to 0 at all times other than ic evaluation. normally set to 0. (10) crystal oscillator fine adjustment x_sw_0 x_sw_1 x_sw_2 ? adjusts the crystal 4.5 mhz reference frequency if beating occurs x?tal osc adj [when a 4.5mhz oscillator element is used] 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 xtal (center value) +150hz xs0, xs1 r0 to r3 continued on next page. c7 0.033 f c10a 1 f c11a 0.033 f c11b 2200pf c12 2.2k ? 1k ? cp1 v dd pin23 +8v pin58 div 5k ? 3k ? sw2 c11 1.3k ? d5 svc704 c4 3pf c3 2pf l5 sw3 sw1 fm osc vt fet_gnd fm_fet_out am_fet_out am_cp fm_cp osc_b osc_c r7 30k ? c4 330pf 3 4 5 6 8 7 9 10 11
LV25400W no.a0633-34/42 continued from preceding page. no. control block/data description related data (11) 2.7v reg adj reg_adj0 reg_adj1 ? adjusts the 2.7 v regulator 2.7v reg adj 0 0 0 1 1 0 1 1 -23mv (center value) +23mv +64mv (12) crystal oscillator selection xs0, xs1 ? selects the crystal element. xs1 xs0 x?tal osc 0 0 1 1 0 1 0 1 4.5mhz illegal value illegal value illegal value (13) hd (wide) if agc amplifier variation correction bits adj_w0 adj_w1 adj_w2 adj_w3 ? corrects for sample-to-sample variations in the if agc amplifier gain amount of correction : 5 db 4 bit (14) do pin control data (2) il0, il1 ? controls the do pin output do pin control data (2) il1 il0 in 0 0 1 1 0 1 0 1 open the i3 pin state (unused) the i2 pin state (unused) the i1 pin state (unused) since there are no connected pins in the cu rrent product, the open setting must be used. (15) do pin control data (1) uld dt0, dt1 ? determines the do pin output. do pin control data (1) uld il0 dt0 do pin 0 0 1 1 0 1 0 1 0 1 0 1 low when not locked. monitor 1 (unused) monitor 2 (unused) (see do control (2)) 1 1 1 1 0 0 1 1 0 1 0 1 open monitor 1 (unused) monitor 2 (unused) (see do control (2)) the following item (5) must also be set when monitoring the unlock detection signal. ul0, ul1 (16) unlock state detection data ul0, ul1 ? selects the phase error (?e) detection wi dth used to judge the pll locked state. if a phase error in excess of the ?e detection width from the table below occurs, the pll is seen as being in the unlocked state. when the pll is seen as being unlocked, the detection pin (do) is set low. ul1 ul0 e detection width detection pin output 0 0 1 1 0 1 0 1 stopped 0 0.5 s 1 s open e is output directly e is delayed by 1 to 2 ms. e is delayed by 1 to 2 ms. uld dt0, dt1 continued on next page. delay unlock state output 1 to 2ms do e
LV25400W no.a0633-35/42 continued from preceding page. no. control block/data description related data (17) crystal oscillator buffer output stop switching two_doff ? stops the crystal oscillator buffer output. 1 bit two-tuner crystal oscillator buffer switching 0 1 normal operation stopped (18) phase comparator control data dz0, dz1 ? controls the phase co mparator's dead zone. dz1 dz0 dead zone mode 0 0 1 1 0 1 0 1 dza dzb dzc dzd the dza setting is selected after the power-on reset. (19) charge pump control data dlc ? forcibly sets the charge pump output to the low level (v ss level). dlc = 1 : low level dlc = 0 : normal operation * : if the ic deadlocks with vco oscillator stopped with the vco control voltage (vtune) at 0 v, the deadlock can be resolved by setting th e charge pump output to the low level and setting vtune to v cc . this item is set to the normal operation state after the power-on reset. (20) ic internal signal i/o port control data ? specifies the i/o direction for the i/o ports data = 0 : input port. the value 0 should be specified in normal operation. = 1 : output port. a value of 1 is used for ic testing. * : this data must be set to 0 at all times other than ic evaluation. (21) rf tuning d/a converter output d31-00 to d31-08 ? applies a control voltage to the rf tuning circuit (varactor). 9 bit (22) tuner off setting d31-09 ? set the ic to tuner off mode. 1 bit tuner off mord 0 1 normal operation tuner-off (23) antenna tuning d/a converter output d31-10 to d31-18 ? applies a control voltage to the antenna tuning circuit (varactor). 9 bit (24) if agc amplifier (narrow/wide) on/off switching d31-25 d31-26 ? operates the if agc amplifier circuit (narrow/wide). d31-25 : wide-10.7mhz ? 0 ? = on , ? 1 ? = off d31-26 : narrow-10.7mhz ? 0 ? = on , ? 1 ? = off each 1 bit (25) forced agc (am/fm) switching d31-27 d31-28 ? operates the forced agc circuit (narrow/wide). d31-27:fm agc ? 0 ? = normal, ? 1 ? = on d31-28:am agc ? 0 ? = normal, ? 1 ? = on each 1 bit (26) iq mixer gain adjustment d31-29 ? switches the fm iq mixer gain. 1 bit iq mixer gain adjustment 0 1 gain down normal operation (27) (28) am/fm wide agc setting d32-0 to d32-3 ? sets the am/fm wide agc sensitivity. 4 bit continued on next page.
LV25400W no.a0633-36/42 continued from preceding page. no. control block/data description related data (29) am/fm narrow agc setting d33-4 to d33-7 ? sets the am/fm narrow agc sensitivity. 4 bit (30) keyed agc setting d32-8 to d32-11 ? controls the fm keyed agc sensitivity. 4 bit (31) am rf agc amplifier threshold (steep) setting d32-12 to d32-15 ? sets the am rf agc amplifie r circuit threshold (steep). 4 bit (32) am rf agc amplifier threshold (gradual) setting d32-16 to d32-19 ? sets the am rf agc amplifie r circuit threshold (gradual). 4 bit (33) s-meter shifter control d32-20 to d32-24 ? controls the fm s-meter shifter circuit output value. 5 bit (34) analog (narrow) if agc clamp variations correction d32-25 to d32-28 ? corrects the sample-to-sample variations in the if agc clamp circuit. amount of correction : 5 db 4 bit (35) fm pin diode forced on state bit fmfetoff ? forcibly sets the fm pin diode to the on state. 1 bit (36) keyed agc connection circuit selection w_keyed ? modifies the keyed agc connection circuit. 1 bit keyed agc switch 0 1 wide + narroww narrow only (37) d31-31 d32-31 ? sub-code address each 1 bit programmable divider structure dvs set divisor (n) input frequency ran ge (f (mhz)) ic internal fmin pin 1 272 to 65535 120 f 270 selected 0 - - stopped * : since the ic is closed internally , the input sensitivity is not specified. 4 bits 12 bits programmable divider swallow counter e fvco/n pd ferf fvco = ferf
LV25400W no.a0633-37/42 phase comparator and charge pump circuits (1) phase comparator and charge pump operation in the pll circuit block shown in figure 1, the phase comp arator compares the phases of the reference frequency (fr) and the comparison frequency (fp), and outputs the amo unt of the phase difference from the charge pump. figure 1 pll circuit block figure 2 shows the phase comparator/charge pump output characteristics. the phase co mparator outputs a voltage v that is proportional to the phase difference between fr and fp. the phase comparator's characteristics can be switched by changing the phase comparator dead zone mode setting. the phase comparator can be set to modes (dza, dzb) in which both the charge pump p-channel and n-channel sides are turned on when the phase difference is small, or can be set to a mode (dzd) that does not output the phase difference when the phase difference is small. figure 2 phase comparator/charge pump characteristics reference divider programmable divider phase detector charge pump lpf vco mixer leakage during strong-field input rf fr fp err[ns] v [v] v [v] v [v] v [v] dead zone(--) dza mode dzb mode dzc mode dzd mode err[ns] err[ns] err[ns] dead zone(-) dead zone 0 dead zone(+) fp > fr fp > fr fp > fr fp > fr fr > fp fr > fp fr > fp fr > fp
LV25400W no.a0633-38/42 (2) dead zone mode characteristics the table below presents an overview of the characteristics in each of the dead zone modes. setting dz1 dz0 dead zone mode charge pump (p/n-channel) state at 0 phase difference dead zone width (for reference purposes) notes 0 0 dza on/on - -(-15[ns]) 0 1 dzb on/on - (-8[ns]) 1 0 dzc on or off close to 0 (0[ns]) illegal setting 1 1 dzd off/off + (+8[ns]) (3) dead zone mode character istics and selection criteria this section describes the characteristics of each dead zone mode and the criteria for selecting that mode. (1) dza mode in dza mode, the correction signal is output from the ch arge pump even if the reference frequency (fr) and comparison frequency (fp) match. this results in excelle nt signal-to-noise ratio characteristics. however, due to the generation of reference frequency component sidebands, beating may occur in the presence of a strong input signal. this is because the pll loop respo nds sensitively to leakage components from the rf stage through the mixer and this modulates the vco. (2) dzb mode like dza mode, in dzb mode the correction signal is output from the charge pump even if the reference frequency (fr) and comparison frequency (fp) match. however, the correction signal voltage is lower in dzb mode than in dza mode. the feature of this mode is that it provides a better signal-to-noise ratio than dzc or dzd mode yet is less susceptible to beating than dza mode. (3) dzc mode in dzc mode, a correction signal proportional to the phase difference between the reference frequency (fr) and comparison frequency (fp) is output from the charge pump. a small amount of noise may occur when the phase difference is close to 0 ns. since the signal-to-noise ratio may degrade significantly at low temperatures (under -30c), this mode should not be used. (4) dzd mode in dzd mode, a correction signal proportional to the phase difference between the reference frequency (fr) and comparison frequency (fp) is output from the charge pump. the correction signal is not output when the phase difference is in the vicinity of . as a result the signal-to-noise ratio is worse than the other modes, but the occurrence of beating is suppressed.
LV25400W no.a0633-39/42 LV25400W bit control specification: reference values 1. fm s-meter shifter lsb msb d32-20 d32-21 d32-22 d32-23 d32-24 functions 0 0 0 0 0 vsm (dc) =1.87v : +5.6db 0 0 0 0 1 vsm (dc) = 2.15v : 0db 1 1 1 1 1 vsm (dc) = 2.45v : -6.0db 2-1. fm ifagc (hd) 2-2. am ifagc (hd) lsb msb lsb msb d2-12 d2-13 d2-14 d2-15 functions d2-12 d2-13 d2-14 d2-15 functions 0 0 0 0 ifagc (hd) -amp-gain : +4db 0 0 0 0 ifagc (hd) -amp-gain : +4db 1 1 0 1 ifagc (hd) -amp-gain : 0db 1 1 0 1 ifagc (hd) -amp-gain : 0db 1 1 1 1 ifagc (hd) -amp-gain : -4db 1 1 1 1 ifagc (hd) -amp-gain : -4db 3-1. fm ifagc (analog) 3-2. am ifagc (analog) lsb msb lsb msb d32-25 d32-26 d32-27 d32-28 functions d32-25 d32-26 d32-27 d32-28 functions 0 0 0 0 ifagc (analog) -amp-gain : +4db 0 0 0 0 ifagc (analog) -amp-gain : +4db 1 1 0 1 ifagc (analog) -amp-gain : 0db 1 1 0 1 ifagc (analog) -amp-gain : 0db 1 1 1 1 ifagc (analog) -amp-gain : -4db 1 1 1 1 ifagc (analog) -amp-gain : -4db 4-1. fm wide-agc-on-level 4-2. am wide-agc-on-level lsb msb lsb msb d32-00 d32-01 d32-02 d32-03 functions d32-00 d32-01 d32-02 d32-03 functions 0 0 0 0 wide-agc-on-level : -8.5db 0 0 0 0 wide-agc-on-level : -8.5db 1 1 1 0 wide-agc-on-level : 0db 1 1 1 0 wide-agc-on-level : 0db 1 1 1 1 wide-agc-on-level : +5.5db 1 1 1 1 wide-agc-on-level : +7.0db 5-1. fm narrow-agc-on-level 5-2. am narrow-agc-on-level lsb msb lsb msb d32-04 d32-05 d32-06 d32-07 functions d32-04 d32-05 d32-06 d32-07 functions 0 0 0 0 narrow-agc-on-level : -9.5db 0 0 0 0 narrow-agc-on-level : -9.0db 1 1 1 0 narrow-agc-on-level : 0db 1 1 1 0 narrow-agc-on-level : 0db 1 1 1 1 narrow-agc-on-level : +6.5db 1 1 1 1 narrow-agc-on-level : +5.0db 6-1. keyed-agc-on-level lsb msb d32-08 d32-09 d32-10 d32-11 functions 0 0 0 0 keyed-agc-on v32 : 0.27v 1 1 1 0 keyed-agc-on v32 : 1.20v 1 1 1 1 keyed-agc-on v32 : 2.25v
LV25400W no.a0633-40/42 data content LV25400W (ac/dc) serial data pll in1 data ccb address control data 1 control data 2 control data 3 control data 4 in1 data contents a0 a1 a2 a3 a4 a5 a6 a7 p0 p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12 p13 p14 p15 osc_d1 osc_d2 am/fm dvs r0 r1 r2 r3 osc_div wb delay_adj0 delay_adj1 mode - - - - - - - - - - - - pll counter value delay-adj 15 fm_us98.1m fref = 100k 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 2176 0 33 mw1000k fref = 10k (usa) 0 0 0 1 0 1 0 0 0 0 0 1 0 1 1 0 1 1 0 1 1 0 1 0 0 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0 23400 0 62 x45fm_us98.1m fref = 100k 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 2176 0 69 x45fm_jp83m fref = 100k delay = 1 0 0 0 1 0 1 0 0 1 0 0 1 1 1 1 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 1 0 1 0 0 0 0 0 2169 1 pll in2 data ccb address control data 1 control data 2 control data 3 control data 4 in2 data contents a0 a1 a2 a3 a4 a5 a6 a7 i/o-1 i/o-2 i/o-3 i/o-4 i/o-5 x_sw_0 x_sw_1 x_sw_2 reg_adj0 reg_adj1 xs0 xs1 adj_w0 adj_w1 adj_w2 adj_w3 il0 il1 dt0 dt1 uld ul0 ul1 two_doff - - - - - - - - dz0 dz1 dlc test0 test1 test2 x'tal-adj ifagc-amp gain (hd) 13 fm reception mode settings 1 0 0 1 0 1 0 0 0 0 0 0 0 0 1 1 0 1 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6 11 15 mw reception mode settings 1 0 0 1 0 1 0 0 0 0 0 0 0 0 1 1 0 1 0 0 1 1 0 1 0 0 0 0 0 1 1 0 1 0 0 1 0 0 0 0 6 11 44 x45 mw reception mode settings 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 1 0 1 0 0 0 0 0 1 1 0 1 0 0 1 0 0 0 0 0 11 48 x45x'tal_adj = 0 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 11 50 x45xtal_adj = 7 (if_dain_w = 11) 1 0 0 1 0 1 0 0 0 0 0 0 0 1 1 1 0 1 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 7 11 pll in3-1 data ccb address control data 1 control data 2 control data 3 control data 4 in3-1 data contents a0 a1 a2 a3 a4 a5 a6 a7 rfdac0 rfdac1 rfdac2 rfdac3 rfdac4 rfdac5 rfdac6 rfdac7 rfdac8 tuneroff antdac0 antdac1 antdac2 antdac3 antdac4 antdac5 antdac6 antdac7 antdac8 anc_off nc_agc_sw noise_agc agc_limit nc_sens0 nc_sens1 wide_off narrow_off fmagc_on amagc_on iqmix-gain dtestsw sub-address rf-dac ant-dac 1 bit-check-0 1 0 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 bit-check-1 1 0 0 1 0 1 1 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 3 bit-check-2 1 0 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 2 5 bit-check-4 1 0 0 1 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 4 7 bit-check-8 1 0 0 1 0 1 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8 8 9 bit-check-16 1 0 0 1 0 1 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 16 16 11 bit-check-32 1 0 0 1 0 1 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 32 32 13 bit-check-64 1 0 0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 64 64 15 bit-check-128 1 0 0 1 0 1 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 128 128 17 bit-check-256 1 0 0 1 0 1 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 256 256 18 bit-check-511 1 0 0 1 0 1 1 0 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 511 511 25 standard fm 1 0 0 1 0 1 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 256 256 26 standard am 1 0 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 27 fm-wide-off 1 0 0 1 0 1 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 256 256 38 fm-iqmix-gain-up 1 0 0 1 0 1 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 256 256 pll in3-2 data ccb address control data 1 control data 2 control data 3 control data 4 in3-2 data contents a0 a1 a2 a3 a4 a5 a6 a7 w_agc0 w_agc1 w_agc2 w_agc3 n_agc0 n_agc1 n_agc2 n_agc3 key_agc0 key_agc1 key_agc2 key_agc3 rfagc_h0 rfagc_h1 rfagc_h2 rfagc_h3 rfagc_s0 rfagc_s1 rfagc_s2 rfagc_s3 s_meter0 s_meter1 s_meter2 s_meter3 s_meter4 adj_n0 adj_n1 adj_n2 adj_n3 fmfetoff w_keyed sub-address wide-agc narrow-agc keyed-agc am-rfagc hard am-rfagc soft fm-s-meter shifter ifagc-amp gain (analog) 13 fm (w-agc-bit = 0) 1 0 0 1 0 11 0 0 0 0 0 1 11011100000000011110000 0 0 1 1 0 7 7 00 15 0 15 fm (w-agc-bit = 15) 1 0 0 1 0 11 0 1 1 1 1 1 11011100000000011110000 0 0 1 1 15 7 7 00 15 0 16 fm (n-agc-bit = 0) 1 0 0 1 0 11 0 1 1 1 0 0 00011100000000011110000 0 0 1 1 7 0 7 00 15 0 18 fm (n-agc-bit = 15) 1 0 0 1 0 11 0 1 1 1 0 1 11111100000000011110000 0 0 1 1 7 15 7 00 15 0 25 standard fm-2 1 0 0 1 0 11 0 1 1 1 0 1 110111000000000 * * * * * 1 1 0 1 0 1 1 7 7 7 0 0 adjust- ment 11 26 standard am-2 1 0 0 1 0 11 0 1 1 1 0 1 11011100100010111110110 1 0 0 1 7 7 7 210 15 11 27 am (w-agc-bit = 0) 1 0 0 1 0 11 0 0 0 0 0 1 11011100100010111110110 1 0 0 1 0 7 7 210 15 11 29 am (w-agc-bit = 15) 1 0 0 1 0 11 0 1 1 1 1 1 11011100100010111110110 1 0 0 1 15 7 7 210 15 11 30 am (n-agc-bit = 0) 1 0 0 1 0 11 0 1 1 1 0 0 00011100100010111110110 1 0 0 1 7 0 7 210 15 11 32 am (a-agc-bit = 15) 1 0 0 1 0 11 0 1 1 1 0 1 11111100100010111110110 1 0 0 1 7 15 7 210 15 11 items marked with an asterisk are vsm adjustment items. the bit values after adjustment must be retained.
LV25400W no.a0633-41/42 sample application circuit 64 63 62 61 60 59 58 57 55 56 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 26 25 27 28 29 30 31 32 270 ? 10.7outn c29 0.022 f + + + + 270 ? 15k ? r38 30k ? r43 1.8k ? r41 3.9k ? r41b xtal_6k or 16k c38 1000pf c35 0.022 f c34 0.022 f c40b 0.022 f c40a 10 f c33 0.1 f c44 0.1 f c46 0.022 f c47 0.022 f r32 10.7outp div_out_if div_out_if 10.7m_out_p 10.7m_out_m hd_out_p hd_out_m vsm_dc vreg27 buff c30 0.022 f c31 0.022 f c32 0.22 f vreg 4v c24 0.22 f vreg 3v v cc d5v c23 0.22 f c22 1 f 270 ? hd_outp c28 0.022 f 270 ? hd_outn c27 0.022 f agc_dac_s iboc-if agc analos-if agc agc_dac_s agc_dac_i agc_dac_i do do am_wago if_n_in2 if_n_in1 vreg49 if_out address_sw am_nagc v cc a5v am_hd_in vsm_ac am_analog_in bypass am_analog_in am_hd_in bypass vreg27 agnd fe_gnd osc_v cc osc_b osc_c vt fet_gnd fm_fet_out am_fet_out am_cp fm_cp xtal_out dgnd xtal_in xtal_gnd xtal_v cc fm_in v cc 8v a m_in cl cl di di v cc a5v v cc d5v ce ce cs xtal_osc out2 270 ? xtal_osc am_ant_d rf_agc bypass am_rf_agc if_w_in2 cf_180k fe_v cc 8v rf_dac ant_dac mix_out2 n_agc mix_out1 am_mix am_mix fm_mix1 fm_mix2 in in in1 in2 fm_antd fm_rf_agc out2 gnd eeprom test nc v cc 4 3 2 1 5 6 7 8 do di sk cs 30k ? 30 ? xtal_osc c17 0.022 f 47k ? m_com fm amp am amp fm amp am amp + - am 1st amp vreg49 w agc rf agc n agc ant d + - vreg4 vreg3 in3-1 in1/in2 bus buff cp1 sw r11 r12 2.2k ? c59 0.1 f c58 30 ? c51 1 f c49 0.022 f c53 30pf c49 0.022 f r56 30k ? r57 30k ? r72 30k ? coil c58b 0.022 f c54 l72 c61 10pf c62 10pf c1000 8pf vcd2 svc208 c58a 100 f c13a 0.022 f c14 10pf 4.5m c15 15pf c10a 1 f c107 0.1 f c12 0.1 f c11a 0.033 f r11 1.3k ? c11b 2200pf 10k ? 3k ? +8v c7 0.01 f c64 2.2 f c64 220k ? c107 1000pf c107 1000pf c64 1000pf c105 5pf c103 4pf 0.15 h c101 18pf 100pf vcd1 svc208 pin_d2 1sv251 r62 180 ? r62 100k ? r107a 100k ? r107b 100k ? r63 100 ? c63 0.1 f r5 30k ? c5 220pf c4 3pf c3 2pf c3g 1pf c2b 1000pf kv1862 c34 330pf sw fm osc k agc n agc w agc ant_dac rf_dac ant d rf agc div buff reference counter programable divider phase detecter swallow counter osc buffer 1/10,1/8 1/6,1/4 in3-2 am mix iq mix vsm + fm cut 6.8 h r70a 1m cph5905 c36 10 f 15pf 36pf c35 0.022 f loding coil d70 1sv251 c37 0.022 f c56 1000pf c57 1000pf r70b 470 ? r70c 220 ? l70a 1mh l70b 47 h r63 470 ? c60 0.022 f
LV25400W ps no.a0633-42/42 sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rate d values (such as maximum ra tings, operating condition ranges, or other parameters) listed in products specif ications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-qual ity high-reliability products, however, any and all semiconductor products fail or malfunction with some probabi lity. it is possible that these probabilistic failures or malfunction could give rise to acci dents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or e vents cannot occur. such measures include but are not limited to protective circuits and error prevention c ircuits for safe design, redundant design, and structural design. upon using the technical information or products descri bed herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable f or any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. information (including circuit diagr ams and circuit parameters) herein is for example only; it is not guaranteed for volume production. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equi pment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor c o.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities conc erned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any in formation storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. this catalog provides information as of december, 2007. specifications and inform ation herein are subject to change without notice.

▲Up To Search▲

Price & Availability of LV25400W

	To Download LV25400W Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .